Typical integrated memory circuits include arrays of memory cells arranged in rows and columns. In many such integrated memory arrays, several redundant rows and columns are provided to be used as substitutes for defective locations in memory. When a defective bit location is identified, rather than treating the entire array as defective, a redundant row or column is substituted for the defective row or column. This substitution is performed by assigning the address of the defective row or column to the redundant row or column such that, when an address signal corresponding to the defective row or column is received, the redundant row or column is addressed instead.
To make substitution of the redundant row or column substantially transparent to a system employing the memory circuit, the memory circuit includes an address detection circuit. The address detection circuit monitors the row and column addresses and, when the address of a defective row or column is received, enables the redundant row or column instead.
One type of address detection circuit is a fuse-bank address detection circuit. Fuse-bank address detection circuits employ a bank of sense lines where each sense line corresponds to a bit of an address. The sense lines are programmed by blowing fuses in the sense lines in a pattern corresponding to the address of the defective row or column. Addresses are then detected by first applying a test voltage across the bank of sense lines. Then, bits of the address are applied to the sense lines. If the pattern of blown fuses corresponds exactly to the pattern of address bits, the sense lines all block current and the voltage across the bank remains high. Otherwise, at least one sense line conducts and the voltage falls. A high voltage thus indicates the programmed address has been detected. A low voltage indicates a different address has been applied.
Typically, the fuses are blown by laser cutting the fuse conductors to remove the conductive paths through the fuses. One problem with such an approach is that laser cutting of the fuses is time consuming, difficult, and imprecise. Using antifuse repair also allows repair of packaged parts. As a consequence, the cost and reliability of memory devices employing fuse bank circuits can be less than satisfactory.
To eliminate the cost, difficulty, and expense of laser cutting, memory devices have recently been developed that employ antifuses in place of conventional fuses. Antifuses are capacitive-type structures that, in their unblown states, form open circuits. Antifuses may be "blown" by applying a high voltage across the antifuse. The high voltage causes the capacitive-type structure to break down, forming a conductive path through the antifuse. Therefore, blown antifuses conduct and unblown antifuses do not conduct.
Typically, the high voltage for blowing antifuses comes from a single voltage source applied to several antifuses simultaneously so that the antifuses can be blown in groups. Due to variations among the individual antifuses, the response to the high voltage may vary significantly across a particular group. For example, some of the antifuses may blow quickly while other, more robust, antifuses may take significantly longer to blow.
As the less robust fuses blow, they begin to draw current from the high voltage source. The cumulative current draw of the less robust fuses can be sufficient to significantly load the high voltage source. Consequently, the output voltage of the high voltage source may drop before the more robust fuses are blown. In some cases, the voltage can drop to a low enough level that the more robust antifuses remain unblown or are only partially blown. As a consequence, the pattern of blown antifuses will not correspond to the appropriate address, and the address detection circuit will not accurately indicate the appropriate address.
One approach to this current-loading problem is to limit the number of antifuses in each group so that the cumulative current draw of the antifuses will be insufficient to pull down the high voltage. However, reducing the number of antifuses in the groups slows the process of blowing the antifuses, thereby decreasing the efficiency with which the memory circuits can be produced.